Computation Structures

Course Description

6.004 offers an introduction to the engineering of digital systems. Starting with MOS transistors, the course develops a series of building blocks — logic gates, combinational and sequential circuits, finite-state machines, computers and finally complete systems. Both hardware and software mechanisms are explored through a series of design examples.

6.004 is required material for any EECS undergraduate who wants to understand (and ultimately design) digital systems. A good grasp of the material is essential for later courses in digital design, computer architecture and systems. The problem sets and lab exercises are intended to give students "hands-on" experience in designing digital systems; each student completes a gate-level design for a reduced instruction set computer (RISC) processor during the semester.

Lecture Notes

Abbreviations

CMOS = complementary metal-oxide-semiconductor
ALU = arithmetic logic unit
OS = operating system

LEC #	TOPICS	LECTURE NOTES
1	Course overview and mechanics, basics of information	(PDF)
2	Digital abstraction, combinational logic, voltage-based encoding	(PDF)
3	CMOS technology, gate design, timing	(PDF)
4	Canonical forms; synthesis, simplification	(PDF)
5	Sequential logic	(PDF)
6	Storage elements, finite state machines	(PDF)
7	Synchronization, metastability	(PDF)
8	Pipelining; throughput and latency	(PDF)
9	Case study: multipliers	(PDF)
10	Beta instruction set architecture, compilation	(PDF)
11	Machine language programming issues	(PDF)
12	Models of computation, programmable architectures	(PDF)
13	Stacks and procedures	(PDF)
14	Non-pipelined Beta implementation	(PDF)
15	Multilevel memories; locality, performance, caches	(PDF)
16	Cache design issues	(PDF)
17	Virtual memory: mapping, protection, contexts	(PDF)
18	Virtual machines: timesharing, OS kernels, supervisor calls	(PDF)
19	Devices and interrupt handlers, preemptive interrupts, real-time issues	(PDF)
20	Communication issues: busses, networks, protocols	(PDF - 1.0MB)
21	Communicating processes: semaphores, synchronization, atomicity, deadlock	(PDF)
22	Pipelined Beta implementation, bypassing	(PDF)
23	Pipeline issues: delay slots, annulment, exceptions	(PDF)
24	Parallel processing, shared memory, cache coherence, consistency criteria	(PDF)
25	Wrapup lecture	(PDF)